Unity-Gain Amplifier With Theoretically Zero Gain Error

Author

Monsurrò, Pietro ; Pennisi, Salvatore ; Scotti, Giuseppe ; Trifiletti, Alessandro

Author_Institution

Dipt. di Ing. Elettron., Univ. di Roma "La Sapienza, Rome

Volume

57

Issue

7

fYear

2008

fDate

7/1/2008 12:00:00 AM

Firstpage

1431

Lastpage

1437

Abstract

This paper presents a unity-gain amplifier architecture, which, unlike already known solutions, provides a theoretically zero gain error without requiring an infinitely large loop gain. The architecture is based on two amplifiers nested in a feedback configuration, which allows a straightforward complementary metal-oxide-semiconductor (CMOS) implementation. Performances are analytically evaluated and compared to those of the traditional solution under similar design settings. Simulations using a 0.35-mum CMOS process are found to be in agreement with theory, and Monte Carlo simulations have also shown the robustness of the proposed approach against process tolerances.

Keywords

CMOS analogue integrated circuits; Monte Carlo methods; amplifiers; CMOS process; Monte Carlo simulation; complementary metal-oxide-semiconductor process; feedback configuration; size 0.35 micron; unity-gain amplifier; zero gain error; Complementary metal–oxide–semiconductor (CMOS) analog circuits; Complementary metal??oxide??semiconductor (CMOS) analog circuits; gain error; unity-gain amplifier;

fLanguage

English

Journal_Title

Instrumentation and Measurement, IEEE Transactions on

Publisher

ieee

ISSN

0018-9456

Type

jour

DOI

10.1109/TIM.2008.917181

Filename

4457467