DocumentCode
1082790
Title
Polycrystalline Si Nanowire SONOS Nonvolatile Memory Cell Fabricated on a Gate-All-Around (GAA) Channel Architecture
Author
Fu, J. ; Jiang, Y. ; Singh, N. ; Zhu, C.X. ; Lo, G.Q. ; Kwong, D.L.
Author_Institution
Inst. of Microelectron., Agency for Sci., Singapore
Volume
30
Issue
3
fYear
2009
fDate
3/1/2009 12:00:00 AM
Firstpage
246
Lastpage
249
Abstract
In this letter, we present SONOS nonvolatile memory device with gate-all-around polycrystalline silicon (poly-Si) nanowire channel. The SONOS memory cell with 23-nm nanowire width, fabricated using top-down CMOS process, exhibits fast programming and erasing speed as well as improved subthreshold behavior of the transistor. Both the memory and transistor characteristics are dependent on the nanowire width-smaller the width, better the performance. The good device characteristics along with simple fabrication method make the poly-Si nanowire SONOS memory a promising candidate for future system-on-panel and system-on-chip applications.
Keywords
CMOS integrated circuits; elemental semiconductors; nanowires; polymer structure; silicon; thin film transistors; CMOS process; gate-all-around channel architecture; gate-all-around polycrystalline silicon; nonvolatile memory cell; nonvolatile memory device; polycrystalline nanowire; Gate-all-around (GAA); SONOS; nanowire; nonvolatile memory; polycrystalline silicon (poly-Si);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2008.2011503
Filename
4760213
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