Title :
Self-aligned ion implant masking for CMOS VLSI technology
Author :
Pimbley, J.M. ; Ghezzo, M.
Author_Institution :
General Electric Research and Development Center, Schenectady, NY
fDate :
4/1/1982 12:00:00 AM
Abstract :
Conventional self-aligned ion implantation masking is often inadequate in CMOS VLSI fabrication. We describe a method of increasing this ion implant masking with minimal additional processing. Scanning electron micrographs portray the enhanced ion implant masking.
Keywords :
CMOS technology; Electrons; Etching; Fabrication; Implants; Insulation; Plasma applications; Resists; Silicon; Very large scale integration;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1982.25494
