Title :
Simulating the competing effects of P- and N-MOSFET hot-carrier aging in CMOS circuits
Author :
Lee, Peter M. ; Garfinkel, Tom ; Ko, Ping K. ; Hu, Chenming
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fDate :
5/1/1994 12:00:00 AM
Abstract :
A PMOSFET hot-carrier degradation model has been incorporated into the reliability simulator BERT-CAS, enabling prediction of dynamic circuit-level degradation in which both PMOSFET and NMOS-FET degradation play a major role. Comparisons with measured data from CMOS ring oscillator frequency shifts show that full aging simulation by CAS can correctly predict the initial frequency increase due to the PMOSFET current enhancement, and the eventual frequency decrease due to the NMOSFET current degradation
Keywords :
CMOS integrated circuits; ageing; circuit analysis computing; circuit reliability; digital simulation; field effect transistor circuits; BERT-CAS; CMOS circuits; MOSFET; NMOSFET current degradation; PMOSFET current enhancement; dynamic circuit-level degradation; frequency decrease; full aging simulation; hot-carrier aging; initial frequency increase; reliability simulator; ring oscillator frequency shifts; Circuit simulation; Current measurement; Degradation; Frequency measurement; Hot carrier effects; Hot carriers; MOSFET circuits; Predictive models; Ring oscillators; Semiconductor device modeling;
Journal_Title :
Electron Devices, IEEE Transactions on
