DocumentCode
1084109
Title
Dual-gate a—Si:H thin film transistors
Author
Tuan, H.C. ; Thompson, M.J. ; Johnson, N.M. ; Lujan, R.A.
Author_Institution
Xerox Palo Alto Research Center, Palo Alto, CA
Volume
3
Issue
12
fYear
1982
fDate
12/1/1982 12:00:00 AM
Firstpage
357
Lastpage
359
Abstract
Dual-gate accumulation mode thin film transistors have been fabricated for the first time in a-Si:H on bulk glass substrates. The devices display exceptionally high performance, as compared to previously reported single-gate a-Si:H transistors. For a channel length of 10 µm and width of 168 µm, drain currents in the range of 5-10 µA were obtained for gate biases of 15 V in both of the two conducting channels induced in the a-Si:H layer. The drain current of the TFT operating in the dual-gate mode was found to be larger than the arithmetic sum of the drain currents through the two individual channels obtained from single-mode operation. A significant difference in dc stability between the two channels was observed. The use of the dual-gate TFT as a diagnostic structure for studying interface properties and contact effects has been demonstrated.
Keywords
Dielectrics; Electrodes; Fabrication; Glass; Laboratories; Plasma sources; Silicon; Stability; Substrates; Thin film transistors;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1982.25599
Filename
1482704
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