DocumentCode
1084785
Title
10 bit 200 MSPS GaAs BiFET sample and hold circuit
Author
Yu, J. ; Beccue, S. ; Ho, W.J. ; Zampardi, P. ; Chang, M.F. ; Wang, K.C.
Author_Institution
Sci. Center, Rockwell Int. Corp., Thousand Oaks, CA, USA
Volume
31
Issue
16
fYear
1995
fDate
8/3/1995 12:00:00 AM
Firstpage
1335
Lastpage
1337
Abstract
A GaAs BiFET sample and hold circuit has been implemented and evaluated. SINAD (signal to noise and distortion) was measured to be ~60 dB, but was limited by the test setup. The device accepts a differential input and produces a differential output. The S/H is clocked differentially at rates of up to 200 MHz. 12 bit performance was expected from SPICE simulations. Despite our test setup limitations, 10 bit performance was observed at 200 MSPS with an input signal frequency of 198 MHz
Keywords
III-V semiconductors; analogue processing circuits; gallium arsenide; monolithic integrated circuits; sample and hold circuits; timing; 12 bit; 198 MHz; 200 MHz; BiFET S/H circuit; GaAs; SINAD; differential clocking; differential input; differential output; sample/hold circuit;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19950947
Filename
408308
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