DocumentCode :
1084997
Title :
Double sampling delta-sigma modulators
Author :
Yang, Hong-Kui ; El-Masry, Ezz I.
Author_Institution :
Dept. of Electr. Eng., Tech. Univ. Nova Scotia, Halifax, NS, Canada
Volume :
43
Issue :
7
fYear :
1996
fDate :
7/1/1996 12:00:00 AM
Firstpage :
524
Lastpage :
529
Abstract :
The double sampling technique can be used to achieve twice the sampling frequency in a sampled-data system without extra requirements for op-amp´s settling time, dc gain, etc. In this paper, theoretical analysis of path gain mismatch on the performance of double sampling delta-sigma modulators (ΔΣM´s) is given. Based on the result, a novel double sampling technique for ΔΣM´s that is insensitive to the path gain mismatch is presented. This technique uses a bilinear double sampling integrator in the first stage, achieving a first order shaping of the path gain mismatch error. Simulation results have been provided to verify the proposed technique
Keywords :
sampled data circuits; sigma-delta modulation; bilinear integrator; double sampling delta-sigma modulator; path gain mismatch; sampled-data system; Capacitors; Circuits; Clocks; Degradation; Delta modulation; Frequency; Operational amplifiers; Performance analysis; Sampling methods; Signal to noise ratio;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.508429
Filename :
508429
Link To Document :
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