An Effective Modeling Framework for the Analysis of Interconnects Subject to Line-Edge Roughness

This letter proposes a complete and efficient simulation framework to assess the effects of line-edge roughness appearing in on-chip lines. The modeling approach consists of three steps. First, a stochastic macromodel is created for the per-unit-length RLGC parameters of the line. Secondly, random conductor edge profiles are generated using randomized splines. These are combined with the stochastic macromodel to readily provide place-dependent RLGC parameters. Finally, the resulting nonuniform transmission line is analyzed by means of a fast and accurate perturbation technique. To validate the proposed approach, a statistical analysis of the response of a coupled inverted embedded microstrip line is carried out for different roughness parameters.