Title :
A single chip Δ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem
Author :
Kim, Daejeong ; Park, Jaejin ; Kim, Sungjoon ; Jeong, Deog-Kyoon ; Kim, Wonchan
Author_Institution :
LG Semicon Co. Ltd., Seoul, South Korea
fDate :
8/1/1995 12:00:00 AM
Abstract :
A 12-b, 19.2-ksamples/s Δ-Σ A/D and D/A converter for a 9600-b/s facsimile modem analog front end is described. In the proposed Δ-Σ ADC, the reference voltage is varied to adjust the signal gain, thus, eliminating the need of a variable gain amplifier. The Δ-Σ DAC uses a 4-b charge integrating subconverter which is insensitive to process variations
Keywords :
digital-analogue conversion; facsimile; facsimile equipment; integrating circuits; modems; quadrature amplitude modulation; sigma-delta modulation; Δ-Σ ADC; 12 bit; 5 V; 9600 bit/s; DAC; analog front end; built-in variable gain stage; charge integrating subconverter; facsimile modem; process variations; reference voltage; signal gain; Attenuation; Bandwidth; Digital modulation; Digital signal processing; Equivalent circuits; Facsimile; Frequency; Gain; Gain control; Modems; Sampling methods; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
