Materials limitations of amorphous-Si:H transistors

Application of two-terminal (back-to-back diode) and three-terminal (FET) amorphous-Si:H devices to the matrix addressing of liquid-crystal displays (LCD) is discussed. a-Si:H back-to-back diodes appear to be suitable switching elements for displays of intermediate complexity. These devices are easy to fabricate and appear to have a high yield. A n analysis of matrix-addressed LCD\´s shows that FET\´s implemented in a low-mobility material, such as a-Si:H, are best suited for (medium) high-resolution capacitorless displays where competing technologies (CdSe, poly-Si) are likely to encounter difficulties in meeting the off requirements. Instabilities in a-Si:H-based devices were studied by fabricating inverted and noninverted FET\´s with a variety of gate dielectrics: SiO2, both thermally grown and sputtered; Si3N4, both by GD and LPCVD; and evaporated SiOx. Comparison of these devices, which are listed in decreasing order of stability, showed that a-Si:H FET\´s with thermal oxide were stable. In other devices, the decrease of the source-drain current ISDwith time was mainly caused by trapping at the semiconductor-dielectric interface. Feasibility of a-Si:H FET-addressed LCD\´s was studied by fabricating experimental 26 × 26 G-H LCD\´s by photolithographic methods on soda-lime glass substrates, using either GD Si3N4or sputtered SiO2as a gate dielectric. FET\´s use a ring layout for the gate geometry to maximize the off resistance and a positive photoconductivity-feedback mechanism to maximize the on current and to minimize cumulative trapping. The Schottky contact inverted FET\´s ( µm; µm) have a switching range > 10⁶. In dc conditions, at a source-drain voltage V, the drain current ISDis typical < 1 pA at a gate voltage and > 1 µA at V. The transistor characteristics are time dependent. The channel mobility, as derived from the linear (triode) regime is about µeff= 0\´02 cm²/V . s at quasi-dc and increases wit- h decreasing pulse length until it saturates at µeff= 0.2 cm²/V . s. ISDdecreases with time to about to of its initial value in ambient light (operating devices) and to about in the dark, mostly due to trapping in the gate dielectric. The time-dependent decrease in ISDhas been studied under dc conditions for the plasma-deposited SiO2and Si3N4gate insulators and under pulse conditions for Si3N4. Auger depth-profile analysis shows that the properties of amorphous hydrogenated silicon FET\´s are not very sensitive to the incorporation of common residual gases (O2, N2). Lifetime tests at room temperature and at 80°C for > 1 year have been carried out and the displays appear to be stable.