An analytic polysilicon depletion effect model for MOSFETs

Author

Rios, Rafael ; Arora, Narain D. ; Huang, Cheng-Liang

Author_Institution

Digital Equipment Corp., Hudson, MA, USA

Volume

15

Issue

4

fYear

1994

fDate

4/1/1994 12:00:00 AM

Firstpage

129

Lastpage

131

Abstract

A novel polysilicon depletion model for MOSFET devices is presented. It is shown that only simple modifications to standard analytical MOSFET models used for circuit simulations are required to account for the polysilicon depletion effect. The accuracy of the model is validated by comparing results to both simulated and measured device characteristics. It is also shown that neglecting the polysilicon depletion effect for devices with nondegenerate polysilicon gates may lead to nonphysical model parameter values and large errors in the calculated intrinsic device capacitances.<>

Keywords

CMOS integrated circuits; circuit analysis computing; digital simulation; insulated gate field effect transistors; semiconductor device models; CMOS technology; MOSFETs; analytic polysilicon depletion effect model; circuit simulations; device characteristics; intrinsic device capacitances; nondegenerate polysilicon gates; nonphysical model parameter values; Analytical models; CMOS technology; Capacitance; Circuit simulation; Doping; Impurities; MOSFETs; Semiconductor device modeling; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.285407

Filename

285407