Threshold voltage of thin-film Silicon-on-insulator (SOI) MOSFET´s

The charge coupling between the front and back gates of thin-film silicon-on-insulator (SOI: e.g,, recrystallized Si on SiO2) MOSFET´s is analyzed, and closed-form expressions for the threshold voltage under all possible steady-state conditions are derived. The expressions clearly show the dependence of the linear-region channel conductance on the back-gate bias and on the device parameters, including those of the back silicon-insulator interface. The analysis is supported by current-voltage measurements of laser-recrystallized SOI MOSFET´s. The results suggest how the back-gate bias may be used to optimize the performance of the SOI MOSFET in particular applications.