• DocumentCode
    1087310
  • Title

    Design and characterisation of pseudo-DTL CMOS gates

  • Author

    Grigoleit, M. ; Syrzycki, Marek

  • Author_Institution
    Simon Fraser Univ., Sch. of Eng. Sci., Burnaby, BC, Canada
  • Volume
    27
  • Issue
    17
  • fYear
    1991
  • Firstpage
    1577
  • Lastpage
    1579
  • Abstract
    A novel approach to CMOS logic gate design, using elements of diode-transistor logic (DTL), has been applied to multiple-input NAND gates. The resulting circuits have been compared with equivalent static CMOS designs, and are shown to offer several advantages.
  • Keywords
    CMOS integrated circuits; NAND circuits; VLSI; diode-transistor logic; logic gates; CMOS logic gate design; multiple-input NAND gates; pseudo-DTL CMOS gates;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19910988
  • Filename
    132815
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1087310