DocumentCode
1087589
Title
Inexact match associative memory cell
Author
Daasch, W. Robert
Author_Institution
Dept. of Electr. Eng., Portland State Univ., OR, USA
Volume
27
Issue
18
fYear
1991
Firstpage
1623
Lastpage
1625
Abstract
A new associative memory cell is described and analysed using SPICE3d1. The CMOS cell uses current summation to compute, in parallel, Hamming distances between the search key and each word in the memory. For 32 bit words, SPICE simulations of a 2 mu m process show a delay of 4 ns/bit for Hamming distances less than three.
Keywords
CMOS integrated circuits; circuit analysis computing; content-addressable storage; integrated memory circuits; parallel processing; 2 micron; 32 bit; 32 bit words; 4 ns; CMOS cell; Hamming distances; SPICE simulations; SPICE3d1; current summation; delay; inexact match associative memory cell;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19911015
Filename
132846
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