DocumentCode
1087645
Title
Digitally adjustable resistors in CMOS for high-performance applications
Author
Gabara, Thaddeus J. ; Knauer, Scott C.
Author_Institution
AT&T Bell Lab., Murray Hill, NJ, USA
Volume
27
Issue
8
fYear
1992
fDate
8/1/1992 12:00:00 AM
Firstpage
1176
Lastpage
1185
Abstract
Methods by which CMOS circuits can be adjusted digitally to generate controlled impedances for use in high-performance circuits are described. Since digital signals are the only inputs to these circuits, on-chip DC power dissipation can be reduced, the circuit can be made more robust, and the impedance of the circuit can be adjusted by manipulating the input digital information. A design of a CMOS series terminated line driver is discussed, and the utilization of the controlled impedance in terminating transmission lines on-chip, constant delay lines, and controlled di /dt output buffers is discussed
Keywords
CMOS integrated circuits; buffer circuits; delay lines; driver circuits; resistors; CMOS circuits; constant delay lines; controlled impedances; controlled output buffers; digitally adjustable-resistors; high-performance circuits; onchip transmission line termination; series terminated line driver; CMOS digital integrated circuits; Delay lines; Digital control; Distributed parameter circuits; Driver circuits; Impedance; Power dissipation; Power transmission lines; Resistors; Robustness;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.148326
Filename
148326
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