DocumentCode
1088655
Title
An advanced SVG technology for 64K junction-shorting PROM´s
Author
Fukushima, Toshitaka ; Ueno, Kouji ; Tanaka, Kazuo
Author_Institution
Fujitsu, Ltd., Kawasaki, Japan
Volume
30
Issue
12
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
1785
Lastpage
1791
Abstract
The memory cell size of the 64 kbit PROM was reduced to 168µm2(0.26 mil2) by using advanced SVG (Shallow V-Groove) isolation and the wafer stepper process. SVG isolation was introduced in 1979 to suppress the SCR latching between two neighboring cells in the 4 kbit junction-shorting PROM. Since then, the cell size has been reduced until it became limited by the widths of word and bit lines. In the 64 kbit PROM, the SVG isolation technology was improved to achieve self-alignment in diffusion, to provide a high breakdown voltage for Schottky diodes, and to increase the flexibility of the mask layout. The size of the peripheral circuitry was thus reduced to allow a smaller cell size and a smaller parasitic capacitance. The memory cell array occupies 45.0 percent of the total die size of 7.14 × 5.28 mm2.
Keywords
Circuits; Epitaxial layers; Etching; Fabrication; Isolation technology; PROM; Schottky diodes; Silicon; Substrates; Thyristors;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1983.21446
Filename
1483347
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