Abstract :
For the original article see ibid., vol.27, p.1262-4, 1991. The commentator indicates that the double-sampling implementation of the SDH buffer is used as delay element and the single-sampling version as reflection circuit. The latter fact seems not to have been recognised by the author, describing the reflection circuit as a modification of the delay element. Care has to be taken in double-sampling circuits not to unbalance the charge flows in both circuit paths. The author replys that the switched-capacitor circuits in the letter are based on realisations previously discussed in two official reports referred to in the letter. Two circuits of these reports are identical with the circuits that are later presented and discussed in the commentator´s letter (see ibid., vol.27, p.639-40, 1991). The influence of parasitic capacitances is a problem, which has to be considered in SC filter realisations.
