DocumentCode :
1089176
Title :
Transistor scaling with constant subthreshold leakage
Author :
Sokel, R.
Author_Institution :
Inmos Corporation, Colorado Springs, CO
Volume :
4
Issue :
4
fYear :
1983
fDate :
4/1/1983 12:00:00 AM
Firstpage :
85
Lastpage :
87
Abstract :
A model for scaling transistors with constant subthreshold leakage is presented. In contrast with other scaling theories, the scaling formulation presented does not necessarily lead to transistors with long channel characteristics. Instead, the transistor is scaled only to enhance circuit performance while meeting circuit specifications-in this case, subthreshold leakage current. The model is critically dependent upon the drain induced barrier lowering effect which has been evaluated as a function of channel length, gate thickness, and channel doping. The effect is found to vary as L^{-m} where m = 1.2-1.4 .
Keywords :
Capacitance; Circuit optimization; Dielectric substrates; Doping; Electronics industry; Helium; Leakage current; Semiconductor process modeling; Subthreshold current; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1983.25657
Filename :
1483401
Link To Document :
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