DocumentCode
1090705
Title
An RCJL decoder for a Josephson memory
Author
Wada, Y. ; Hidaka, M. ; Ishida, I.
Author_Institution
NEC Corporation, Kawasaki-City, Japan
Volume
4
Issue
12
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
455
Lastpage
456
Abstract
A resistor-coupled Josephson logic (RCJL) [1] decoder was proposed and experimentally tested to satisfy the requirements for a Josephson cache memory. The RCJL decoder is an ac powered latch decoder and is constructed from RCJL AND-OR units. Therefore, it has advantages in regard to higher packing density, reduced decoding time, and intrinsically damped resonance phenomena over interferometer decoders. A 4-bit decoder, consisting of 28 AND-OR units, was fabricated using a 4-µm Pb-alloy technology. A ±14- percent gate-bias-current margin was obtained.
Keywords
Coupling circuits; Critical current; Decoding; Josephson junctions; Latches; Logic testing; Magnetic flux; Resistors; Resonance; Switching circuits;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1983.25800
Filename
1483544
Link To Document