DocumentCode
1091207
Title
Breakdown voltage design considerations in VDMOS structures
Author
Mena, José G. ; Salama, C. Andre T
Author_Institution
University of Toronto, Toronto, Canada
Volume
31
Issue
1
fYear
1984
fDate
1/1/1984 12:00:00 AM
Firstpage
109
Lastpage
113
Abstract
Analytical closed-form expressions for the breakdown voltage in punched-through VDMOS structures, including the effect of floating guardrings and field plates, are derived in this paper. The theoretical results are confirmed by measured data on VDMOS devices, as well as on floating-guardring diode test structures, fabricated on n/n+epitaxial substrates.
Keywords
Avalanche breakdown; Breakdown voltage; Closed-form solution; Diodes; Doping profiles; Equations; Ionization; Substrates; Sun; Testing;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1984.21483
Filename
1483768
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