DocumentCode
1093437
Title
Design and performance analysis of load-distributing fault-tolerant network
Author
Choi, Sang Bang ; Somani, Arun K.
Author_Institution
Dept. of Electron. Eng., Inha Univ., Inchon, South Korea
Volume
45
Issue
5
fYear
1996
fDate
5/1/1996 12:00:00 AM
Firstpage
540
Lastpage
551
Abstract
We propose a general design technique for high-performance fault-tolerant networks in multiprocessor systems. The proposed technique called extra link multistage interconnection network (ELMIN) can distribute the load evenly and tolerate faults by providing maximal independent paths at the expense of some additional hardware (extra links), which is much smaller than most of the networks proposed earlier. In this paper, the technique is applied to some specific networks, i.e., the CIN (cube interconnection network) and the d-dilated CIN, to show how to maximize the number of redundant paths. The routing algorithms for the ELMIN have the same simplicity as that of the original MIN. We analyze the performance of the proposed networks and also simulate them along with several others under the buffered and unbuffered packet switching environment. Both analysis and simulation show the high performance of the proposed networks without regard to the presence of faults
Keywords
fault tolerant computing; multistage interconnection networks; packet switching; parallel architectures; performance evaluation; ELMIN; cube interconnection network; extra link multistage interconnection network; fault-tolerant; fault-tolerant network; load-distributing; multiprocessor systems; packet switching; performance analysis; redundant paths; routing algorithms; Analytical models; Fault tolerance; Fault tolerant systems; Hardware; Multiprocessing systems; Multiprocessor interconnection networks; Packet switching; Performance analysis; Routing; Switches;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.509906
Filename
509906
Link To Document