DocumentCode
1094032
Title
Offset compensation technique for CMOS current comparators
Author
Palmisano, Carlo ; Palumbo, Gaetano
Author_Institution
Dipartimento di Elettrico Elettronico e Sistemistico, Catania Univ.
Volume
30
Issue
11
fYear
1994
fDate
5/26/1994 12:00:00 AM
Firstpage
852
Lastpage
854
Abstract
A simple technique for offset compensation in current comparators is prepared. Apart from a residual clock-feedthrough error, a great reduction in the offset voltage is achieved at the expense of a slight increase in complexity. To illustrate the use of the proposed technique, a compensated current mirror comparator is discussed
Keywords
CMOS integrated circuits; comparators (circuits); compensation; optimisation; CMOS current comparators; complexity; current mirror comparator; offset compensation technique; offset voltage; residual clock-feedthrough error;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19940523
Filename
287478
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