DocumentCode :
1094325
Title :
Information Theoretic Approach to Complexity Reduction of FIR Filter Design
Author :
Chang, Chip-Hong ; Chen, Jiajia ; Vinod, A.P.
Author_Institution :
Nanyang Technol. Univ., Singapore
Volume :
55
Issue :
8
fYear :
2008
Firstpage :
2310
Lastpage :
2321
Abstract :
This paper presents a new paradigm of design methodology to reduce the complexity of application-specific finite-impulse response (FIR) digital filters. A new adder graph data structure called the multiroot binary partition graph (MBPG) is proposed for the formulation of the multiple constant multiplication problem of FIR filter design. The set of coefficients in any fixed point representation is partitioned into symbols so that common subexpression identification and elimination become congruent to information parsing for data compression. A minimum number of different pairs or groups of symbols and residues can be used to code a set of coefficients based on their probability and conditional probability of occurrence. This ingenious concept enables the notion of entropy to be applied as a quantitative measure to evaluate the coding density of different compositions of symbols towards a set of coefficients. The minimal vertex set MBPG synthesized by our proposed information theoretic approach results in direct correspondences between the vertices and adders, and edges and physical interconnections. Unlike the common subexpression elimination algorithms based on other graph data structures, the symbol-level information carried in each vertex and the graph isomorphism of MBPG promise further fine-grain optimization in a reduced search space. One such optimization that has been exploited in this paper is the shift-inclusive computation reordering to minimize the width of every two´s complement adder to further reduce the implementation cost and the critical path delay of the filter. Experiment results show that the proposed algorithm can contribute up to 19.30% reductions in logic complexity and up to 61.03% reduction in critical path delay over other minimization methods.
Keywords :
FIR filters; adders; data compression; encoding; entropy; fixed point arithmetic; graph theory; logic circuits; minimisation; probability; search problems; adder graph data structure; application-specific finite-impulse response digital filters design; coding density; complexity reduction; data compression; entropy; fine-grain optimization; fixed point representation; graph isomorphism; information parsing; information theoretic approach; logic complexity; minimization methods; multiple constant multiplication problem; multiroot binary partition graph; occurrence conditional probability; reduced search space; shift-inclusive computation reordering; subexpression identification; symbol-level information; Common subexpression elimination (CSE); Finite impluse response digital filter; common subexpression elimination; finite-impulse response (FIR) digital filter; graph; information theory; multiple constant muliplication; multiple constant multiplication;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2008.920090
Filename :
4468689
Link To Document :
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