• DocumentCode
    1094348
  • Title

    The anatomy of hardware accelerators for VLSI circuit design

  • Author

    Russel, G.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Newcastle upon Tyne Univ.
  • Volume
    6
  • Issue
    3
  • fYear
    1989
  • fDate
    6/1/1989 12:00:00 AM
  • Firstpage
    82
  • Lastpage
    91
  • Abstract
    With the advent of VLSI, many architectures have evolved for the viable implementation of hardware accelerators as a means of improving the performance of the CAD algorithms used in the design of VLSI circuits. These architectures, which include massively parallel machines, dataflow machines, vector processors etc., together with their application to CAD algorithms, are described
  • Keywords
    VLSI; circuit CAD; CAD algorithms; VLSI circuit design; anatomy; dataflow machines; hardware accelerators; massively parallel machines; vector processors;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Engineering Journal
  • Publisher
    iet
  • ISSN
    0263-9327
  • Type

    jour

  • Filename
    42888
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1094348