Title :
Fault simulation and test generation-an overview
Author_Institution :
Premier Consultants, Godalming, UK
fDate :
6/1/1989 12:00:00 AM
Abstract :
A design or test engineer may proudly boast `I have a fault coverage of 96%´. What does he or she mean by that and how does it relate to yield in production or detection of system failures? The paper explains some basic concepts with regard to fault simulation and indicates the relationship between fault coverage and yield
Keywords :
circuit CAD; fault location; fault coverage; fault simulation; test generation; yield;
Journal_Title :
Computer-Aided Engineering Journal
