DocumentCode :
1094363
Title :
Pipelined computations of B-spline curve
Author :
Wang, Chi-Hsu ; Liu, Hore-Yuan ; Wen, Rong-Sheng
Author_Institution :
Nat. Taiwan Inst. of Technol., Taipei, Taiwan
Volume :
22
Issue :
2
fYear :
1992
Firstpage :
327
Lastpage :
331
Abstract :
Pipelined structures for computing the B-spline curve are described. Various representations of the B-spline curve are explored, and their pipelined architectures are implemented. In comparison with previous approaches, the method used is more precise with the analysis of computational complexity in every computational environment, and the performance improvement is in accordance with the experimental results of previous approaches. It is also interesting to note that the recursive B-spline representation is a better one in the pipelined environment. This situation, however, is totally reversed in the single processor environment. The INMOS transputer development system was used to verify the pipelined algorithms developed
Keywords :
computational complexity; parallel architectures; pipeline processing; splines (mathematics); transputers; B-spline curve; INMOS transputer development system; computational complexity; computational environment; pipelined architectures; recursive B-spline representation; single processor environment; Computational complexity; Computational efficiency; Computer architecture; Costs; Councils; Hardware; Microelectronics; Performance analysis; Spline; Systolic arrays;
fLanguage :
English
Journal_Title :
Systems, Man and Cybernetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9472
Type :
jour
DOI :
10.1109/21.148406
Filename :
148406
Link To Document :
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