• DocumentCode
    1094752
  • Title

    The performance of source-coupled FET logic circuits that use GaAs MESFETs

  • Author

    Vu, Tho T. ; Peczalski, Andrzej ; Lee, Kang W. ; Conger, Jeff

  • Author_Institution
    Honeywell Syst. & Res. Center, Minneapolis, MN, USA
  • Volume
    23
  • Issue
    1
  • fYear
    1988
  • Firstpage
    267
  • Lastpage
    279
  • Abstract
    Gallium arsenide (GaAs) source-coupled FET logic (SCFL) circuits have demonstrated a wide range of tolerance to threshold voltage and a partial immunity to temperature variation. A complete SCFL implementation including the voltage reference circuit for both high-speed and low-power applications is described.<>
  • Keywords
    III-V semiconductors; field effect integrated circuits; gallium arsenide; integrated logic circuits; GaAs; SCFL; low-power applications; partial immunity; source-coupled FET logic circuits; threshold voltage; voltage reference circuit; Circuit noise; Delay; FETs; Gallium arsenide; Integrated circuit noise; Logic circuits; MESFETs; Power dissipation; Power supplies; Threshold voltage;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.288
  • Filename
    288