• DocumentCode
    1095169
  • Title

    32-bit processing unit for embedded space flight applications

  • Author

    Stachetti, Vincent ; Gaisler, Jiri ; Goller, Gerhard ; Le Gargasson, Christophe

  • Author_Institution
    MATRA MHS, Nantes, France
  • Volume
    43
  • Issue
    3
  • fYear
    1996
  • fDate
    6/1/1996 12:00:00 AM
  • Firstpage
    873
  • Lastpage
    878
  • Abstract
    This paper describes the concurrent error-detection methods as well as the design and layout hardening techniques employed in the ERC 32, a 32-bit modular fault-tolerant processing core for embedded space flight applications. The core consists of three devices: an Integer Unit (IU), a Floating Point Unit (FPU), and a Memory Controller (MEC)
  • Keywords
    aerospace computing; error detection; fault tolerant computing; radiation hardening (electronics); real-time systems; space vehicle electronics; special purpose computers; 32 bit; ERC 32; Floating Point Unit; Integer Unit; Memory Controller; concurrent error-detection; design; embedded space flight applications; layout; modular fault-tolerant processing unit; radiation hardening; Application software; CMOS logic circuits; Computer errors; Error correction; Fault tolerance; Radiation hardening; Registers; Single event upset; Space technology; Space vehicles;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/23.510727
  • Filename
    510727
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1095169