Title :
Novel highly linear MOS integrator using a negative impedance convertor (NIC)
Author :
Takagi, Shinichi ; Fujii, Naotaka
Author_Institution :
Dept. of Phys. Electron., Tokyo Inst. of Technol.
fDate :
5/12/1994 12:00:00 AM
Abstract :
A simple modification scheme for the integrator by Tsao el al. (see ibid., vol. 27, p. 772-3, 1991) is proposed in order to remove the voltage followers used as a buffer when the integrators are interconnected
Keywords :
MOS integrated circuits; integrating circuits; negative impedance convertors; integrator interconnection; linear MOS integrator; negative impedance convertor;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19940547
