DocumentCode
1096135
Title
Vertical n-p-n bipolar transistors fabricated on buried oxide SOI
Author
Greeneich, E.W. ; Reuss, R.H.
Author_Institution
Arizona State University, Tempe, AZ
Volume
5
Issue
3
fYear
1984
fDate
3/1/1984 12:00:00 AM
Firstpage
91
Lastpage
93
Abstract
Vertical n-p-n bipolar transistors have been fabricated in silicon-on-insulator (SOI) films prepared by buried oxide implantation. Electrical device characteristics are shown to be comparable to those obtained on devices fabricated in bulk silicon, indicating no significant degradation owing to the buried oxide layer. Dielectric isolation in excess of 1011Ω.cm and µ 3 × 106V/cm is measured.
Keywords
Annealing; Bipolar transistors; Degradation; Etching; Fabrication; Implants; MOSFETs; Resists; Silicon on insulator technology; Substrates;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1984.25842
Filename
1484218
Link To Document