Design and characterization of a CMOS off-chip driver/receiver with reduced power-supply disturbance

Author

Hanafi, Hussein I. ; Dennard, Robert H. ; Chen, Chih-Liang ; Weiss, Russell J. ; Zicherman, David S.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

27

Issue

5

fYear

1992

fDate

5/1/1992 12:00:00 AM

Firstpage

783

Lastpage

791

Abstract

A CMOS off-chip signal driver that achieves a 2.5-3 times smaller di/dt noise than the conventional design while not incurring the penalty of signal delay is described. It minimizes L di/dt effects by reducing the output signal swing by about a factor of 2 and by providing a controlled ramp rate for the output current. The circuit has a nearly constant output resistance for source termination of transmission lines, and includes a receiver designed for the smaller signal swing. Simulations show a driver-receiver delay of 3 ns for a 7.5-cm line on a multichip package with a peak di/dt of only 12 mA/ns. Driver-receiver delay and noise measurements are also presented

Keywords

CMOS integrated circuits; delays; driver circuits; electron device noise; receivers; 3 ns; CMOS; controlled ramp rate; delay; multichip package; noise measurements; off-chip driver/receiver; offchip type; power supply disturbance reduction; receiver; signal driver; CMOS technology; Circuit noise; Delay; Driver circuits; Integrated circuit interconnections; Integrated circuit technology; Noise reduction; Packaging; Signal design; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.133169

Filename

133169