Trenched Schottky barrier PMOS for latchup resistance

A new CMOS technology for VLSI applications has been developed. It provides latchup resistance, good performance, reduced source/drain resistance, and allows the use of shallower junctions with little increase in technological complexity. The key feature of this new structure is the realization of a self-aligned diffused lateral ring around the Schottky PMOS source and drain (S/D) that combines the advantages of the diffused technology with the latchup resistance of the Schottky source and drain.