DocumentCode
1097339
Title
Amore Address Mapping with Overlapped Rotating Entries
Author
Dekker, G.J. ; van de Goor, A.J.
Author_Institution
Delft University of Technology, The Netherlands
Volume
7
Issue
3
fYear
1987
fDate
6/1/1987 12:00:00 AM
Firstpage
22
Lastpage
34
Abstract
A memory management unit that supports demand paging is implemented with standard logic and fast-access RAM chips, resulting in much faster address translation that that provided by the standard Motorola MC68451 MMU.
Keywords
Logic; Memory architecture; Memory management; Operating systems; Power system reliability; Protection; Read-write memory; Signal generators; Signal processing; Very large scale integration;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.1987.304980
Filename
4089851
Link To Document