DocumentCode :
1097381
Title :
Small geometry MOS transistor capacitance measurement method using simple on-chip circuits
Author :
Oristian, J. ; Iwai, H. ; Walker, J. ; Dutton, R.
Author_Institution :
Stanford University, Stanford, CA
Volume :
5
Issue :
10
fYear :
1984
fDate :
10/1/1984 12:00:00 AM
Firstpage :
395
Lastpage :
397
Abstract :
A method of measuring the gate capacitance of very small geometry devices using simple on-chip circuits is described. Short-channel effects observed in gate capacitance measurements of an MOS transistor with Weff/Leff= 9.2 µm/0.8 µm are presented. Measurement results show that the resolution of the technique is much better than 0.1 fF.
Keywords :
Calibration; Capacitance measurement; Capacitors; Geometry; Integrated circuit measurements; MOSFETs; Production; Pulse amplifiers; Pulse measurements; Voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1984.25961
Filename :
1484337
Link To Document :
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