DocumentCode :
1097391
Title :
Improvement of mask-limited yield with a vote-taking lithographic scheme
Author :
Fu, C.C. ; Dameron, D.H.
Author_Institution :
Stanford Electronics Laboratories, Stanford, CA
Volume :
5
Issue :
10
fYear :
1984
fDate :
10/1/1984 12:00:00 AM
Firstpage :
398
Lastpage :
400
Abstract :
A lithographic technique which can significantly reduce the effect of photomask defects is investigated. It is based on exposures of multiple reticle fields containing identical patterns, and is especially suitable for 1 × wafer steppers. The principle, requirements, and initial experimental results of this method are presented.
Keywords :
Contamination; Geometry; Inspection; Integrated circuit technology; Integrated circuit yield; Lithography; Printing; Raw materials; Resists; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1984.25962
Filename :
1484338
Link To Document :
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