Title :
Edge-defined self-alignment of submicrometer overlaid devices
Author :
Malhi, S.D.S. ; Chatterjee, P.K. ; Bonifield, T.D. ; Leiss, J.E. ; Carter, D.E. ; Pinizzotto, R.F. ; Coleman, D.J.
Author_Institution :
Texas Instruments Inc., Dallas, TX
fDate :
10/1/1984 12:00:00 AM
Abstract :
A novel device structure for self-aligning the overlaid device in a stacked CMOS process is introduced and demonstrated. The structure allows submicrometer channel length devices to be fabricated without using advanced lithographic technology. The self-alignment feature should permit a dense layout for CMOS static RAM applications.
Keywords :
Boron; CMOS process; CMOS technology; Etching; Implants; MOSFETs; Power dissipation; Random access memory; Read-write memory; SRAM chips;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1984.25973
