Trench capacitor leakage in high-density DRAM´s

The leakage current between trench capacitors for megabit dynamic MOS memories has been modeled and studied through simulations. The minimum substrate doping density, to limit the leakage current to 1 pA/µm, has been determined as a function of trench-trench spacing. The effect of all other relevant parameters on the required substrate doping density has also been investigated. Furthermore, the substrate doping density at which impact ionization causes avalanche breakdown at the trench capacitor junction has been estimated. It is found that, for trench spacing of 0.75 µm or more, one can always find an intermediate range of substrate doping concentrations for which both the trench-trench leakage and the junction breakdown can be avoided.