Title :
A VLSI-suitable Schottky-barrier CMOS process
Author :
SWIRHUN, Stanley E. ; Sangiorgi, Enrico ; Weeks, Andrew J. ; Swanson, Richard M. ; Saraswat, Krishna C. ; Dutton, Robert W.
Author_Institution :
Stanford University, Stanford, CA
fDate :
2/1/1985 12:00:00 AM
Abstract :
Trenched Schottky-barrier (TSB) contact PMOS devices for use in latchup-free CMOS are examined in detail, and compared to Schottky-contact PMOS. Measurements and simulations show that the TSB structure has significant advantages in gain and current leakage over the Schottky-contact structure. CMOS using TSB PMOS may be made unconditionally free of latchup. The tradeoffs involving PMOS source-drain implant dose are made explicit and correlated to latchup measurements.
Keywords :
CMOS process; CMOS technology; Circuits; Current measurement; Implants; MOS devices; Power supplies; Thyristors; Very large scale integration; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1985.21929
