Title :
A high-speed 1-Mbit EPROM with a Ti-silicided gate
Author :
Narita, Yoshitaka ; Ohya, Shuichi ; Murao, Yukinobu ; Kanauchi, Shushi ; Kikuchi, Masanori
Author_Institution :
NEC Corporation, Kanagawa, Japan
fDate :
2/1/1985 12:00:00 AM
Abstract :
A high-speed and high-density 1-Mbit EPROM has been developed by utilizing a 1.0-µm minimum design rule and Ti-silicided gate technology. Selective Ti silicidation of the poly-Si gate has been successfully employed to reduce the word line resistance. The sheet resistance has been reduced to about 2 Ω/ without degrading the programming, erasing, and retention characteristics. Both Ti silicidation and device size reduction have been combined to achieve the fast access time of 100 ns.
Keywords :
Assembly; Circuits; Degradation; EPROM; Electronics packaging; MOSFETs; Microcomputers; Nonvolatile memory; Pins; Silicidation;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1985.21969
