Optimization of series resistance in sub-0.2 μm SOI MOSFET´s

Author

Su, L.T. ; Sherony, M.J. ; Hang Hu ; Chung, J.E. ; Antoniadis, D.A.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

Volume

15

Issue

5

fYear

1994

fDate

5/1/1994 12:00:00 AM

Firstpage

145

Lastpage

147

Abstract

The optimization of device series resistance in ultra-thin film SOI devices is studied through 2-D simulations and process experiments. The series resistance is dependent on the contact resistivity of the silicide to silicon and the silicide geometry. To achieve low series resistance, very thin silicides that do not fully consume the SOI film are needed. A novel cobalt salicidation technology using titanium/cobalt laminates is used to demonstrate sub-0.2 μm, thin-film SOI devices with excellent performance and very low device series resistance.

Keywords

cobalt; electric resistance; elemental semiconductors; insulated gate field effect transistors; semiconductor device models; semiconductor-insulator boundaries; silicon; thin film transistors; 0.2 micron; 2D simulations; Co salicidation technology; Co-Ti; CoSi/sub 2/; SOI MOSFET; Si; Ti/Co laminates; contact resistivity; process experiments; series resistance; silicide geometry; ultrathin film SOI devices; Cobalt; Conductivity; Contact resistance; Immune system; MOSFET circuits; Medical simulation; Semiconductor films; Silicides; Silicon; Thin film devices;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.291591

Filename

291591