DocumentCode
1099272
Title
High performance ultrathin SOI MOSFET´s obtained by localized oxidation
Author
Faynot, O. ; Giffard, B.
Author_Institution
CEA, Centre d´´Etudes Nucleaires de Grenoble, France
Volume
15
Issue
5
fYear
1994
fDate
5/1/1994 12:00:00 AM
Firstpage
175
Lastpage
177
Abstract
In this paper, we present a new and simple method to process ultrathin fully depleted SOI MOSFET´s. Series resistance problems in the full-wafer thinning method are presented and compared with our locally thinned process. Device design of the method is also discussed in terms of current level. The comparison of different process architectures allows us to define the best design rules for these transistors. To validate the method, experimental characteristics of locally thinned accumulation-mode MOSFET´s are presented.<>
Keywords
insulated gate field effect transistors; oxidation; semiconductor technology; semiconductor-insulator boundaries; silicon; Si; accumulation-mode MOSFET; current level; design rules; full-wafer thinning method; localized oxidation; locally thinned process; process architectures; series resistance; transistors; ultrathin SOI MOSFET; Design methodology; Etching; Implants; MOS devices; MOSFET circuits; Oxidation; Process design; Semiconductor films; Silicon; Substrates;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/55.291595
Filename
291595
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