• DocumentCode
    1100405
  • Title

    Self-Aligned Planar Double-Gate MOSFETs by Bonding for 22-nm Node, With Metal Gates, High- \\kappa Dielectrics, and Metallic Source/Drain

  • Author

    Vinet, M. ; Poiroux, T. ; Licitra, C. ; Widiez, J. ; Bhandari, J. ; Previtali, B. ; Vizioz, C. ; Lafond, D. ; Arvet, C. ; Besson, P. ; Baud, L. ; Morand, Y. ; Rivoire, M. ; Nemouchi, F. ; Carron, V. ; Deleonibus, S.

  • Author_Institution
    CEA-LETI/Minatec, Grenoble
  • Volume
    30
  • Issue
    7
  • fYear
    2009
  • fDate
    7/1/2009 12:00:00 AM
  • Firstpage
    748
  • Lastpage
    750
  • Abstract
    In this letter, we report the fabrication and characterization of self-aligned double-gate MOSFETs with gate length down to 6 nm. Based on molecular bonding, the interest of this original process relies on the fact that, for the first time, technological options such as planar process, independently biasable gates, and metallic source and drain are integrated all together to address critical issues for sub-22-nm node, such as variability, short channel effect control, and access resistance decrease. Good electrical performance of pMOS transistors is demonstrated. Short channel effects are very well controlled down to 30 nm. The independent biasing of the two gates allows tuning of the characteristics, depending on the targeted applications.
  • Keywords
    MOSFET; dielectric materials; semiconductor device manufacture; MOSFET; access resistance decrease; high- kappa dielectrics; metal gates; metallic source/drain; molecular bonding; pMOS transistors; short channel effect control; short channel effects; size 22 nm; size 30 nm; size 6 nm; Bonding; Dielectrics; Electrostatics; Etching; Fabrication; Hafnium oxide; MOSFETs; Plasma chemistry; Silicon; Tin; Double gate; MOSFET; molecular bonding; variability;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2009.2020614
  • Filename
    5109808