New Gate-Bias Voltage-Generating Technique With Threshold-Voltage Compensation for On-Glass Analog Circuits in LTPS Process

Author

Chen, Jung-Sheng ; Ker, Ming-Dou

Author_Institution

Nat. Chiao-Tung Univ., Hsinchu

Volume

3

Issue

3

fYear

2007

Firstpage

309

Lastpage

314

Abstract

A new proposed gate-bias voltage-generating technique with threshold-voltage compensation for analog circuits in the low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) is proposed. The new proposed gate-bias voltage-generating circuit with threshold-voltage compensation has been successfully verified in an 8-mum LTPS process. The experimental results have shown that the impact of TFT threshold-voltage variation on the biasing circuit can be reduced from 30% to 5% under a biasing voltage of 3 V. The new proposed gate-bias voltage-generating technique with threshold-voltage compensation enables the analog circuits to be integrated and implemented by the LTPS process on glass substrate for an active matrix LCD panel.

Keywords

analogue circuits; cryogenic electronics; thin film transistors; LTPS process; TFT; active matrix LCD panel; gate-bias voltage-generating technique; low-temperature polycrystalline silicon; on-glass analog circuits; thin-film transistors; threshold-voltage compensation; Active matrix liquid crystal displays; Analog circuits; Capacitors; Clocks; Glass; Silicon; Substrates; Switches; Thin film transistors; Threshold voltage; Analog circuit; biasing circuit; low-temperature polycrystalline silicon (LTPS); thin-film transistor (TFT); threshold-voltage compensation; threshold-voltage variation;

fLanguage

English

Journal_Title

Display Technology, Journal of

Publisher

ieee

ISSN

1551-319X

Type

jour

DOI

10.1109/JDT.2007.900916

Filename

4292122