DocumentCode :
1101310
Title :
A new approach to model CMOS latchup
Author :
Wu, Chung-Yu ; Yang, Yeu-Haw ; Chang, Chih ; Chang, Ching-Chu
Author_Institution :
Portland State University, Portland, OR
Volume :
32
Issue :
9
fYear :
1985
fDate :
9/1/1985 12:00:00 AM
Firstpage :
1642
Lastpage :
1653
Abstract :
Based upon the concept of the λ-type 
characteristics, CMOS latchup is modeled and latchup criteria are constructed. According to the model and the criteria, conditions which lead to latchup can be expressed in terms of triggering currents, parasitic resistances, and device parameters. Therefore, latchup initiation can be predicted. Both transient simulation results and experimental results coincide with theoretical predictions and calculations. This substantiates the correctness of the proposed model.
characteristics, CMOS latchup is modeled and latchup criteria are constructed. According to the model and the criteria, conditions which lead to latchup can be expressed in terms of triggering currents, parasitic resistances, and device parameters. Therefore, latchup initiation can be predicted. Both transient simulation results and experimental results coincide with theoretical predictions and calculations. This substantiates the correctness of the proposed model.Keywords :
CMOS integrated circuits; Circuit simulation; Guidelines; Predictive models; SPICE; Semiconductor device modeling; Thermal resistance; Thyristors; Very large scale integration; Voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1985.22174
Filename :
1484920
Link To Document :
