A simple punchthrough voltage model for short-channel MOSFET´s with single channel implantation in VLSI

Based on the step-profile approximation and geometrical analysis, the punchthrough voltage of short-channel enhancement n-channel MOSFET´s with single channel implantation has been derived by defining a punchthrough depth. The punchthrough depth, which represents the distance of the two-dimensional potential ridge from the SiO2-Si interface, is calculated by the surface potential of the punchthrough point. Therefore, the derived punchthrough voltage model is then analytically expressed in terms of device geometries and implant parameters. Comparisons between the developed model and the experimental devices have been made and excellent agreement has been obtained.