• DocumentCode
    110182
  • Title

    Mapping Defect Density in MBE Grown {\\rm In}_{0.53}{\\rm Ga}_{0.47}{\\rm As} Epitaxial Layers on Si Substrate Using Esaki Diode Valley Characteristics

  • Author

    Majumdar, K. ; Thomas, Paul ; Wei-Yip Loh ; Pui-Yee Hung ; Matthews, K. ; Pawlik, David ; Romanczyk, Brian ; Filmer, Matthew ; Gaur, Ayush ; Droopad, Ravi ; Rommel, Sean L. ; Hobbs, Chris ; Kirsch, P.D.

  • Author_Institution
    Sematech, Albany, NY, USA
  • Volume
    61
  • Issue
    6
  • fYear
    2014
  • fDate
    Jun-14
  • Firstpage
    2049
  • Lastpage
    2055
  • Abstract
    Growing good quality III-V epitaxial layers on Si substrate is of utmost importance to produce next generation high-performance devices in a cost effective way. In this paper, using physical analysis and electrical measurements of Esaki diodes, fabricated using molecular beam epitaxy grown In0.53Ga0.47As layers on Si substrate, we show that the valley current density is strongly correlated with the underlying epi defect density. Such a strong correlation indicates that the valley characteristics can be used to monitor the epi quality. A model is proposed to explain the experimental observations and is validated using multiple temperature diode I-V data. An excess defect density is introduced within the device using electrical and mechanical stress, both of which are found to have a direct impact on the valley current with a negligible change in the peak current characteristics, qualitatively supporting the model predictions.
  • Keywords
    III-V semiconductors; crystal defects; elemental semiconductors; epitaxial layers; gallium arsenide; indium compounds; molecular beam epitaxial growth; silicon; tunnel diodes; Esaki diode valley characteristics; In0.53Ga0.47As; MBE; Si; defect density; electrical measurements; electrical stress; epitaxial layers; mechanical stress; molecular beam epitaxy; next generation high performance devices; physical analysis; valley current density; Current density; Photonic band gap; Silicon; Stress; Substrates; Temperature; Tunneling; Esaki diode; III-V on Si; III??V on Si; epi defect density; excess current; negative differential resistance; tunneling; tunneling.;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2318597
  • Filename
    6812155