DocumentCode :
1102198
Title :
On Applying Graph Theory to ILP Analysis
Author :
Durán, Raúl ; Rico, Rafael
Volume :
4
Issue :
4
fYear :
2006
fDate :
6/1/2006 12:00:00 AM
Firstpage :
291
Lastpage :
298
Abstract :
The evaluation of computer architectures requires new tools that complement the customary simulations. Graph theory can help to create a new frame of fine grain parallelism analysis. The differences found between the superscalar performance in x86 and non-x86 processors and the peculiar characteristics of the x86 instruction set architecture recommend to carry out a thorough study of the available parallelism at the machine language layer. Starting off from graph theory foundations, new concepts are introduced, from reduced valence to data dependence matrix D, the latter characterizing a code sequence in a mathematical manner. This matrix satisfies a series of properties and restrictions and provides information about the ability of the code to be processed concurrently. The different sources of data dependencies can be composed, facilitating a way to analyze their final influence on the degree of parallelism.
Keywords :
Degradation; Gaussian processes; Graph theory; Hardware; Computer architecture evaluation; graph theory; instruction level parallelism; instructions set architecture;
fLanguage :
English
Journal_Title :
Latin America Transactions, IEEE (Revista IEEE America Latina)
Publisher :
ieee
ISSN :
1548-0992
Type :
jour
DOI :
10.1109/TLA.2006.4472126
Filename :
4472126
Link To Document :
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