Title :
Resistance modulation effect in n-well CMOS
Author :
Niitsu, Youichiro ; Sasaki, Gen ; Nihira, Hiroyuki ; Kanzaki, Koichi
Author_Institution :
Toshiba Research and Development Center, Kawasaki City, Japan
fDate :
11/1/1985 12:00:00 AM
Abstract :
The characteristics of n-well CMOS latchup have been measured and quantitatively analyzed. It was found that the resistance of the substrate and of the well modulated by minority-carrier injection from the emitter of the parasitic bipolar transistors, and that the latchup trigger current was about two times larger than that calculated without the modulation. It was also confirmed that the holding current level is well explained if the modulation effect is brought into consideration. The latchup analysis with the modulation effects should give useful information for optimizing the structure and concentration of the well and the substrate.
Keywords :
Bipolar transistors; CMOS technology; Current supplies; Electrical resistance measurement; FETs; Information analysis; Semiconductor device noise; Substrates; Variable structure systems; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1985.22262