Title :
An analytical quasi-saturation model considering heat flow for a DMOS device
Author :
Liu, C.M. ; Kuo, J.B. ; Wu, Y.-P.
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
6/1/1994 12:00:00 AM
Abstract :
This paper reports an analytical quasi-saturation model considering heat flow for a DMOS device. As verified by the PISCES results, the analytical model, which considers heat flow provides a good prediction of the much worse quasi-saturation behavior due to the elevated lattice temperature. This is a result of the limited heat sinking capability of the thermal contact node. Based on the analysis, for a DMOS device operating with a contact thermal resistance of less than 104 K/W, the drain current at quasi-saturation is found acceptable with a lattice temperature below 350 K
Keywords :
heat transfer; insulated gate field effect transistors; power transistors; semiconductor device models; thermal analysis; thermal resistance; 350 K; DMOS device; PISCES verification; analytical quasi-saturation model; elevated lattice temperature; heat flow; limited heat sinking capability; thermal contact node; Analytical models; Contact resistance; Current measurement; Electrical resistance measurement; Heat sinks; Lattices; Semiconductor devices; Temperature; Thermal resistance; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
