Abstract :
An asynchronous unit delay is an n-input n-output asynchronous sequential circuit such that the present value of the output n-tuple is equal to the value of the input n-tuple prior to the last input change. The delay is of significance as a building block for shift register realizations of asynchronous circuits.
Keywords :
Asynchronous, equivalent flow table, fundamental mode, pulse controlled.; Asynchronous circuits; Circuit testing; Clocks; Delay; Flip-flops; Pulse circuits; Pulse generation; Sequential circuits; Shift registers; Signal processing; Asynchronous, equivalent flow table, fundamental mode, pulse controlled.;
